Electrically erasable and programmable memory devices having flash memory cells are found in a wide variety of electrical devices. An example flash memory cell, also known as a floating gate transistor memory cell, may be similar to a field effect transistor, having a source region and a drain region that is spaced apart from the source region to form an intermediate channel region. A floating gate, which ma be made of doped polysilicon, may be disposed over the channel region and may be electrically isolated from the channel region by a layer of gate oxide. A control gate may be fabricated over the floating gate, and it may also be made of doped polysilicon. The control gate may be electrically separated from the floating gate by at dielectric layer. Thus, the floating gate is “floating,” in the sense that it may be insulated from the channel, the control gate and all other components of the flash memory cell.
An example flash memory cell may be programmed by storing charge on the floating gate. The charge thereafter may remain an the gate for an indefinite period even after power has been removed from the flash memory cell. Flash memory cells may therefore be referred to as non-volatile. Charge may be stored on the floating gate by applying appropriate voltages to the control gate and the drain or source. For example, negative charge can be placed on the floating gate by grounding the source while applying a sufficiently large positive voltage to the control gate to attract electrons, which tunnel through the gate oxide to the floating gate from the channel region. The voltage applied to the control gate, called a programming voltage, and the duration that the programming voltage is applied as well as the charge originally residing on the floating gate, determine the amount of charge residing on the floating gate after programming.
An example flash memory cell may be read by applying a positive control gate to source voltage having, a magnitude greater than a threshold voltage. The amount of charge stored on the flash memory cell may determine the magnitude of the threshold voltage that must be applied to the control gate to allow the flash memory cell to conduct current between the source and the drain. As negative charge is added to the floating gate, the threshold voltage of the flash memory cell increases. During a read operation, a read voltage may be applied to the control gate that is large enough to render the cell conductive if insufficient charge is stored on the floating gate, but not large enough to render the cell conductive if sufficient charge is stored on the floating gate. During the read operation, the drain, which is used as the output terminal of the cell, may be precharged to a positive voltage, and the source may be coupled to ground. Therefore, if the floating gate of the flash memory cell is sufficiently charged, the drain will remain at the positive voltage. If the floating gate of the flash memory cell is not sufficiently charged, the cell will ground the drain.
Before a flash memory cell can be programmed, it must be erased in some cases by removing charge from the floating gate. The cell can be erased by applying a gate-to-source voltage to the cell that has a polarity opposite that used for programming. Specifically, the control gate may be grounded, and a large positive voltage applied to the source to cause the electrons to tunnel through the gate oxide and deplete charge from the floating gate. In another approach, a relatively large negative voltage is applied to the control gate, and a positive voltage, such as a supply voltage, is applied to the source region.
A typical flash memory device includes a number of flash memory cells, which may be arranged in rows and columns. Two common types of flash memory array architectures are the “NAND” and “NOR” architectures, so called for the logical form in which the basic flash memory cell configuration of each is arranged. NOR flash may generally act as a NOR gate—e.g. when a word line is brought high, a corresponding transistor may act to pull an output bit line low. NAND flash may generally include floating-gate transistors connected in a way resembling a NAND gate—e.g. several transistors may be connected in series, and only when all word lines are high may a bit line be pulled low.
Generally, NOR flash memory may provide a faster read response than NAND flash memory. Moreover, NAND flash memory may require housekeeping processes to refresh the memory and repair had blocks.